Two weeks ago in Yokohama, several companies hosted SystemC 2010 Japan. Over 200 design and verification engineers, architecture and algorithm engineers, EDA specialists, managers, and software designers attended the event. Presentation were made by EDA vendors and users alike, with leading companies like Renesas, Ricoh, and Sony discussing their experiences with SystemC, ESL and high-level synthesis. By all reports it was a great success (on a scale of 1 to 5, almost 75% of the attendees gave the seminar a rating of 4 or 5!) and speaks to the continued momentum that SystemC has in the market.
In a survey, 65% of the attendees said they have used or are now using SystemC and SystemC tools in their current flow. More than 52% said that they are using high-level synthesis (HLS) — the most of any category. So what does all of this tell us?
Well, it’s clear that SystemC and SystemC HLS have moved well beyond the trial phase. Some of the most respected companies in the world were discussing their methodologies in use today and their vision for the next couple of years. The user community for SystemC design is now setting the direction. Japan has been a leader in SystemC HLS since 2000, and the attendees made it clear they intend to continue the push forward.
Why SystemC?
This is a question that never seems to get old. Maybe it’s because for years EDA marketeers have told us ANSI-C is all you’ll ever need! The fact is that ANSI-C cannot handle real design and verification needs and the designers in Japan know it. Those surveyed at SystemC 2010 Japan said their SystemC usage falls into these 5 categories (multiple answers allowed):
- 52.7% HLS
- 44.8% Functional verification
- 33.5% Virtual platform / software design
- 30.5% Architecture design
- 1.5% Other
So why use SystemC instead of ANSI-C? It’s true that ANSI-C and SystemC can both be synthesized, but that’s not where the problem lies. The problem is in the modeling and design environment that you need to build. Sure you can synthesize a serial algorithm in ANSI-C — but real designs have hierarchy, concurrency, control and complex interfaces where data is exchanged in parallel. What about modeling a virtual platform and the design architecture? You could add non-standard language extensions or develop your own event manager (effectively creating a custom simulator), but is that what you want to spend your time doing? Let’s face it — ANSI-C just doesn’t cut it. SystemC was developed specifically to rectify ANSI-C’s shortcomings for hardware design.
SystemC is a C++ class library that is “hardware aware,” and there’s a lot of online material to help you learn about its advantages. Forte’s CTO, John Sanguinetti, has written a couple of articles about the topic. I’d recommend reading “Transitioning from C/C++ to SystemC in high-level design” that appeared recently at Embedded.com, as well as “I can’t imagine designing hardware in C…” that appeared right here in Forte’s CynCity blog. Read these and you’ll see why ANSI-C doesn’t work for anything more than trivial hardware design.
Want more? There was a panel about it at DAC this year! And while they probably won’t admit it, even the EDA vendors who trashed SystemC a year ago are starting to sing a different tune.



