Continuing with our series on modular interfaces, today we’re going to talk about one of the most powerful features in Cynthesizer–the ability to create custom interfaces and use them at a high level. These are more than just ready/valid handshakes or external memory interfaces like I showed you last time. These are very [...]
Archive of posts filed under the Methodology category.
Modular Interfaces Part I: Benefits
High-level synthesis (HLS) is just that–high level–a design approach that lets you work at a level above having to wade through pins and wires and state machines. There are many factors to consider in choosing an HLS tool, but one of them is so fundamental that it often gets overlooked.
It’s interfaces. I’m not just [...]
SystemC Hits A High Note
Two weeks ago in Yokohama, several companies hosted SystemC 2010 Japan. Over 200 design and verification engineers, architecture and algorithm engineers, EDA specialists, managers, and software designers attended the event. Presentation were made by EDA vendors and users alike, with leading companies like Renesas, Ricoh, and Sony discussing their experiences with SystemC, ESL and [...]
I can’t imagine designing hardware in C …
I recently had a conversation with an old friend from my graduate school days who, when I told him about Forte and high-level synthesis, said, “I can’t imagine designing hardware in C, or any other programming language.” This guy is one of the best programmers I know — he wrote the user interface code for [...]
What to expect from high-level synthesis
For nearly a decade Forte Design Systems has been working with customers to design and implement high-level synthesis (HLS) strategies and methodologies. These customers ask a lot of questions as they try to determine if HLS is right for them. But there’s one question they almost never ask: “What should I expect from high-level synthesis?”
They [...]
Hierarchy in SystemC: Why it’s so important for HLS!
Last time, I looked at the verification advantages of using SystemC for HLS. This time, I want to explore another important capability of SystemC that makes it far superior to ANSI C for hardware design.
I’m talking about structural hierarchy. SystemC supports hierarchy while ANSI C does not. Structural hierarchy means submodules, connected together [...]
Need another reason to use SystemC for HLS? The verification advantage is the best of all.
The “language war” in high-level system (HLS) design has been waging for a while now. You’ve probably read a lot of online publications touting the advantages of using SystemC over ANSI C to design at an abstract level. If you were to take what everyone is saying and boil it down to a few [...]
